Product Summary
The MT48H16M16LFBF-75 is a high-speed CMOS, dynamic random-access memory containing 268,435,456-bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x16’s 67,108,864-bit banks is organized as 8,192 rows by 512 columns by 16 bits. Each of the x32’s 67,108,864-bit banks is organized as 4,096 rows by 512 columns by 32 bits.
Parametrics
MT48H16M16LFBF-75 absolute maximum ratings: (1)Voltage on VDD/VDDQ supply relative to VSS (1.8V): –0.3 to +2.7 V; (2)Voltage on inputs, NC or I/O balls relative to VSS (1.8V): –0.3 to +2.7V; (3)Storage temperature plastic: –55 to +150℃。
Features
MT48H16M16LFBF-75 features: (1)Fully synchronous; all signals registered on positive edge of system clock; (2)VDD/VDDQ = 1.70–1.95V; (3)Internal, pipelined operation; column address can be changed every clock cycle; (4)Four internal banks for concurrent operation; (5)Programmable burst lengths: 1, 2, 4, 8, or continuous page1; (6)Auto precharge, includes concurrent auto precharge; (7)Auto refresh and self refresh modes; (8)LVTTL-compatible inputs and outputs; (9)On-chip temperature sensor to control refresh rate; (10)Partial-array self refresh (PASR); (11)Deep power-down (DPD); (12)Selectable output drive (DS); (13)64ms refresh period (8,192 rows).
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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MT48H16M16LFBF-75 AT:G TR |
IC SDRAM 256MBIT 132MHZ 54VFBGA |
Data Sheet |
Negotiable |
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MT48H16M16LFBF-75 IT:G TR |
IC SDRAM 256MBIT 132MHZ 54VFBGA |
Data Sheet |
Negotiable |
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MT48H16M16LFBF-75 IT:H TR |
IC SDRAM 256MBIT 133MHZ 54VFBGA |
Data Sheet |
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MT48H16M16LFBF-75 IT:H |
IC SDRAM 256MBIT 133MHZ 54VFBGA |
Data Sheet |
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MT48H16M16LFBF-75:G TR |
IC SDRAM 256MBIT 132MHZ 54VFBGA |
Data Sheet |
Negotiable |
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MT48H16M16LFBF-75:H |
SDRAM 256M-BIT 1.8V 54-PIN VFBGA |
Data Sheet |
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