Product Summary
The MC10101P is a quad 2–input OR/NOR gate with one input from each gate common to pin 12.
Parametrics
MC10101P specifications: (1)2-Input OR-Function Logic Gate; (2)Motorola; (3)Logic Gates; (4)Circuits Per Package=4; (5)Features=Comp avail; (6)Noise Rej. Max.=150m; (7)P(D) Max.(W) Power Dissipation=100m; (8)Vsup Nom.(V) Supply Voltage=-5.2; (9)Package=DIP; (10)Pins=16; (11)Military=N; (12)Technology=ECL.
Features
MC10101P features: (1)PD = 25 mW typ/gate (No Load); (2)tpd = 2.0 ns typ; (3)tr, tf = 2.0 ns typ (20%–80%).
Diagrams
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![]() MC10 |
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![]() MC100E016FN |
![]() ON Semiconductor |
![]() Counter Shift Registers 5V ECL 8-Bit Binary |
![]() Data Sheet |
![]() Negotiable |
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![]() MC100E016FNG |
![]() ON Semiconductor |
![]() Counter Shift Registers 5V ECL 8-Bit Binary Up Synchronous |
![]() Data Sheet |
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![]() MC100E016FNR2 |
![]() ON Semiconductor |
![]() Counter Shift Registers 5V ECL 8-Bit Binary |
![]() Data Sheet |
![]() Negotiable |
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![]() MC100E016FNR2G |
![]() ON Semiconductor |
![]() Counter Shift Registers 5V ECL 8-Bit Binary Up Synchronous |
![]() Data Sheet |
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![]() MC100E101FN |
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![]() IC GATE OR/NOR QUAD 4INP 28-PLCC |
![]() Data Sheet |
![]() Negotiable |
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