MPC8245LVV350D

Product Summary

The MPC8245LVV350D integrated processor is composed of a peripheral logic block and a 32-bit superscalar MPC603e core. The MPC8245LVV350D combines a PowerPC MPC603e processor core built on Power Architecture technology with a PCI bridge so that system designers can rapidly design systems using peripherals designed for PCI and the other standard interfaces. Also, a high-performance memory controller supports various types of ROM and SDRAM. The MPC8245LVV350D is the second of a family of products that provide system-level support for industry-standard interfaces with an MPC603e processor core.

Parametrics

MPC8245LVV350D absolute maximum ratings: (1)Supply voltage-CPU core and peripheral logic: –0.3V to 2.25V; (2)Supply voltage-memory bus drivers: –0.3V to 3.6V; (3)Supply voltage-PCI and standard I/O buffers: –0.3V to 3.6V; (4)Supply voltage-PLLs: –0.3V to 2.25V; (5)Supply voltage-PCI reference: –0.3V to 5.4V; (6)Input voltage: –0.3V to 3.6V; (7)Operational die-junction temperature range: 0℃ to 105℃; (8)Storage temperature range: –55℃ to 150℃.

Features

MPC8245LVV350D features: (1)16-Kbyte instruction cache; (2)16-Kbyte data cache; (3)Lockable L1 caches—Entire cache or on a per-way basis up to three of four ways; (4)Dynamic power management: 60x nap, doze, and sleep modes ; (5)Various operating frequencies and bus divider ratios; (6)32-bit address bus, 64-bit data bus; (7)Full memory coherency; (8)Decoupled address and data buses for pipelining of peripheral logic bus accesses; (9)Store gathering on peripheral logic bus-to-PCI writes; (10)Up to 2 Gbytes of SDRAM memory; (11)High-bandwidth data bus (32- or 64-bit) to SDRAM; (12)Programmable timing supporting SDRAM; (13)One to eight banks of 16-, 64-, 128-, 256-, or 512-Mbit memory devices; (14)Operates up to 66 MHz; (15)PCI 2.2-compatible; (16)PCI 5.0-V tolerance; (17)64-byte transfer queue per channel; (18)Interrupt on completed segment, chain, and error; (19)Local-to-local memory ; (20)PCI-to-PCI memory; (21)Local-to-PCI memory; (22)PCI memory-to-local memory.

Diagrams